Invention Grant
US08633580B2 Integrated void fill for through silicon via 有权
通过硅通孔的集成空隙填充

Integrated void fill for through silicon via
Abstract:
A microelectronic assembly having a through hole extending through a first wafer (or chip) and a second wafer (or chip) are provided. The first and second wafers (or chips) have confronting faces and metallic features at the faces which are joined together to assemble the first and second wafers (or chips) leaving a gap between the confronting faces. A hole is etched in the first wafer (or chip), then material is sputtered to form a wall of material in the gap between wafers (or chips). Etching continues to extend the hole into or through the second wafer (or chip). The hole is filled to form a substantially vertical through silicon conductive via.
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