Invention Grant
- Patent Title: Translation of input/output addresses to memory addresses
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Application No.: US12821170Application Date: 2010-06-23
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Publication No.: US08635430B2Publication Date: 2014-01-21
- Inventor: David Craddock , Thomas A. Gregg , Dan F. Greiner , Eric N. Lais
- Applicant: David Craddock , Thomas A. Gregg , Dan F. Greiner , Eric N. Lais
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Heslin, Rothenberg, Farley & Mesiti P.C.
- Agent John E. Campbell; Blanche E. Schiller, Esq.
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
An address provided in a request issued by an adapter is converted to an address directly usable in accessing system memory. The address includes a plurality of bits, in which the plurality of bits includes a first portion of bits and a second portion of bits. The second portion of bits is used to index into one or more levels of address translation tables to perform the conversion, while the first portion of bits are ignored for the conversion. The first portion of bits are used to validate the address.
Public/Granted literature
- US20110320758A1 TRANSLATION OF INPUT/OUTPUT ADDRESSES TO MEMORY ADDRESSES Public/Granted day:2011-12-29
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