Invention Grant
US08637357B2 CMOS Transistor with dual high-k gate dielectric and method of manufacture thereof
有权
具有双高k栅介质的CMOS晶体管及其制造方法
- Patent Title: CMOS Transistor with dual high-k gate dielectric and method of manufacture thereof
- Patent Title (中): 具有双高k栅介质的CMOS晶体管及其制造方法
-
Application No.: US13444752Application Date: 2012-04-11
-
Publication No.: US08637357B2Publication Date: 2014-01-28
- Inventor: Hong-Jyh Li
- Applicant: Hong-Jyh Li
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/84
Abstract:
A CMOS device with transistors having different gate dielectric materials and a method of manufacture thereof. A CMOS device is formed on a workpiece having a first region and a second region. A first gate dielectric material is deposited over the second region. A first gate material is deposited over the first gate dielectric material. A second gate dielectric material comprising a different material than the first gate dielectric material is deposited over the first region of the workpiece. A second gate material is deposited over the second gate dielectric material. The first gate material, the first gate dielectric material, the second gate material, and the second gate dielectric material are then patterned to form a CMOS device having a symmetric Vt for the PMOS and NMOS FETs.
Public/Granted literature
- US20120193725A1 CMOS Transistor With Dual High-k Gate Dielectric and Method of Manufacture Thereof Public/Granted day:2012-08-02
Information query
IPC分类:
