Invention Grant
- Patent Title: Interconnect structures and methods for back end of the line integration
- Patent Title (中): 用于线路集成后端的互连结构和方法
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Application No.: US13164940Application Date: 2011-06-21
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Publication No.: US08637400B2Publication Date: 2014-01-28
- Inventor: David V. Horak , Charles W. Koburger , Shom Ponoth , Chih-Chao Yang
- Applicant: David V. Horak , Charles W. Koburger , Shom Ponoth , Chih-Chao Yang
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Roberts Mlotkowski Safran & Cole, P.C.
- Agent Parashos Kalaitzis
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/4763 ; H01L21/31 ; H01L23/52
Abstract:
A method of forming a semiconductor structure includes forming a sacrificial conductive material layer. The method also includes forming a trench in the sacrificial conductive material layer. The method further includes forming a conductive feature in the trench. The method additionally includes removing the sacrificial conductive material layer selective to the conductive feature. The method also includes forming an insulating layer around the conductive feature to embed the conductive feature in the insulating layer.
Public/Granted literature
- US20120329267A1 Interconnect structures and methods for back end of the line integration Public/Granted day:2012-12-27
Information query
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