Invention Grant
- Patent Title: Oxide terminated trench MOSFET with three or four masks
- Patent Title (中): 具有三个或四个掩模的氧化物端接沟槽MOSFET
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Application No.: US13747265Application Date: 2013-01-22
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Publication No.: US08637926B2Publication Date: 2014-01-28
- Inventor: Sik Lui , Anup Bhalla
- Applicant: Alpha and Omega Semiconductor Incorporated
- Applicant Address: US CA San Diego
- Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee Address: US CA San Diego
- Agency: JDI Patent
- Agent Joshua D. Isenberg
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66
Abstract:
An oxide termination semiconductor device may comprise a plurality of gate trenches, a gate runner, and an insulator termination trench. The gate trenches are located in an active region. Each gate trench includes a conductive gate electrode. The insulator termination trench is located in a termination region that surrounds the active region. The insulator termination trench is filled with an insulator material to form an insulator termination for the semiconductor device. The device can be made using a three-mask or four-mask process.
Public/Granted literature
- US20130126966A1 OXIDE TERMINATED TRENCH MOSFET WITH THREE OR FOUR MASKS Public/Granted day:2013-05-23
Information query
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