Invention Grant
US08638110B2 High resolution circuit for converting capacitance-to-time deviation
有权
用于转换电容 - 时间偏差的高分辨率电路
- Patent Title: High resolution circuit for converting capacitance-to-time deviation
- Patent Title (中): 用于转换电容 - 时间偏差的高分辨率电路
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Application No.: US12675111Application Date: 2008-07-21
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Publication No.: US08638110B2Publication Date: 2014-01-28
- Inventor: Sung Sik Lee , Myung Lae Lee , Gunn Hwang , Chang Auck Choi
- Applicant: Sung Sik Lee , Myung Lae Lee , Gunn Hwang , Chang Auck Choi
- Applicant Address: KR Daejeon
- Assignee: Electronics and Telecommunications Research Institute
- Current Assignee: Electronics and Telecommunications Research Institute
- Current Assignee Address: KR Daejeon
- Priority: KR10-2007-0087257 20070829
- International Application: PCT/KR2008/004252 WO 20080721
- International Announcement: WO2009/028798 WO 20090305
- Main IPC: G01R27/26
- IPC: G01R27/26

Abstract:
There is provided a high resolution circuit for converting a capacitance-to-time deviation including a capacitance deviation detecting unit generating two detection signals having a phase difference corresponding to variations of capacitance of an micro electro mechanical system (MEMS) sensor; a capacitance deviation amplifying unit dividing frequencies of the two detection signals to amplify the phase difference corresponding to the capacitance deviation; and a time signal generating unit generating a time signal having a pulse width corresponding to the amplified phase difference.
Public/Granted literature
- US20110133758A1 HIGH RESOLUTION CIRCUIT FOR CONVERTING CAPACITANCE-TO-TIME DEVIATION Public/Granted day:2011-06-09
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