Invention Grant
US08638597B2 Bit line charge accumulation sensing for resistive changing memory 有权
电阻变化存储器的位线电荷累积检测

Bit line charge accumulation sensing for resistive changing memory
Abstract:
A memory array includes a plurality of magneto-resistive changing memory cells. Each resistive changing memory cell is electrically between a source line and a bit line and a transistor electrically between the resistive changing memory cell and the bit line. The transistor has a gate electrically between a source region and a drain region and the source region being electrically between the r magneto-resistive changing memory cell and the gate. A word line is electrically coupled to the gate. A bit line charge accumulation sensing for magneto-resistive changing memory is also disclosed.
Public/Granted literature
Information query
Patent Agency Ranking
0/0