Invention Grant
US08638629B2 Refresh control circuit, memory apparatus and refresh control method using the same 有权
刷新控制电路,存储装置和使用其的刷新控制方法

Refresh control circuit, memory apparatus and refresh control method using the same
Abstract:
A memory apparatus is configured to generate refresh addresses with different values in response to one refresh command and an address, and perform a plurality of refresh operations with time differences in response to the refresh addresses. Herein, the refresh operations are performed within a refresh row cycle time.
Information query
Patent Agency Ranking
0/0