Invention Grant
US08639864B1 Method and system for facilitating communication between a host and downstream devices in a data storage system 有权
用于促进数据存储系统中的主机与下游设备之间的通信的方法和系统

Method and system for facilitating communication between a host and downstream devices in a data storage system
Abstract:
A diplex FPGA is utilized to fan out a single high speed host universal asynchronous receiver transmitter (“UART”) channel into a number of diplex UART channels. The diplex FPGA includes a microprocessor, memory, a host UART and a number of diplex UARTs. In operation, the microprocessor polls each of the UARTs in a “round robin” manner and accepts packets from the host UART for transmission downstream and from the diplex UARTs for transmission upstream.
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