Invention Grant
- Patent Title: Insulated gate type semiconductor device and method for fabricating the same
- Patent Title (中): 绝缘栅型半导体器件及其制造方法
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Application No.: US13747557Application Date: 2013-01-23
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Publication No.: US08642401B2Publication Date: 2014-02-04
- Inventor: Hiroshi Inagawa , Nobuo Machida , Kentaro Oishi
- Applicant: Renesas Electronics Corporation , Hitachi Tobu Semiconductor, Ltd.
- Applicant Address: JP Tokyo JP Tokyo
- Assignee: Renesas Electronics Corporation,Renesas Eastern Japan Semiconductor, Inc.
- Current Assignee: Renesas Electronics Corporation,Renesas Eastern Japan Semiconductor, Inc.
- Current Assignee Address: JP Tokyo JP Tokyo
- Agency: Miles & Stockbridge P.C.
- Priority: JP2001-042352 20010219
- Main IPC: H01L21/332
- IPC: H01L21/332

Abstract:
In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a portion of a gate pillar which is constituted by both the gate-purpose conductive layer and a cap insulating film for capping an upper surface of the gate-purpose conductive layer is projected from the major surface of the semiconductor substrate; a side wall spacer is provided on a side wall of the projected portion of the gate pillar; and the source-purpose conductive layer is connected to a contact region of the major surface of the semiconductor substrate, which is defined by the side wall spacer.
Public/Granted literature
- US20130137223A1 INSULATED GATE TYPE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Public/Granted day:2013-05-30
Information query
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