Invention Grant
US08642414B2 MOS transistor structure with in-situ doped source and drain and method for forming the same
有权
具有原位掺杂源极和漏极的MOS晶体管结构及其形成方法
- Patent Title: MOS transistor structure with in-situ doped source and drain and method for forming the same
- Patent Title (中): 具有原位掺杂源极和漏极的MOS晶体管结构及其形成方法
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Application No.: US13132768Application Date: 2011-01-19
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Publication No.: US08642414B2Publication Date: 2014-02-04
- Inventor: Jing Wang , Lei Guo , Jun Xu
- Applicant: Jing Wang , Lei Guo , Jun Xu
- Applicant Address: CN
- Assignee: Tsinghua University
- Current Assignee: Tsinghua University
- Current Assignee Address: CN
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Priority: CN201010177623 20100520
- International Application: PCT/CN2011/070392 WO 20110119
- International Announcement: WO2011/143942 WO 20111124
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A MOS transistor structure with an in-situ doped source and/or drain and a method for forming the same are provided. The method comprises steps of: providing a substrate; forming a high Ge content layer on the substrate; forming a gate stack on the high Ge content layer and forming a side wall of one or more layers on both sides of the gate stack; etching the high Ge content layer to form a source region and/or a drain region; and forming a source and/or a drain in the source region and/or the drain region respectively by a low-temperature selective epitaxy, and introducing a doping gas during the low-temperature selective epitaxy to heavily dope the source and/or the drain and to in-situ activate a doping element.
Public/Granted literature
- US20120032231A1 MOS TRANSISTOR STRUCTURE WITH IN-SITU DOPED SOURCE AND DRAIN AND METHOD FOR FORMING THE SAME Public/Granted day:2012-02-09
Information query
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