Invention Grant
- Patent Title: Semiconductor device having silicon-diffused metal wiring layer and its manufacturing method
- Patent Title (中): 具有硅扩散金属布线层的半导体器件及其制造方法
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Application No.: US13348364Application Date: 2012-01-11
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Publication No.: US08642467B2Publication Date: 2014-02-04
- Inventor: Koichi Ohto , Toshiyuki Takewaki , Tatsuya Usami , Nobuyuki Yamanishi
- Applicant: Koichi Ohto , Toshiyuki Takewaki , Tatsuya Usami , Nobuyuki Yamanishi
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sughrue Mion, PLLC
- Priority: JP2002-132780 20020508; JP2002-302841 20021017; JP2003-130484 20030508
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/522
Abstract:
In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.
Public/Granted literature
- US20120108060A1 SEMICONDUCTOR DEVICE HAVING SILICON-DIFFUSED METAL WIRING LAYER AND ITS MANUFACTURING METHOD Public/Granted day:2012-05-03
Information query
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