Invention Grant
- Patent Title: Substrate processing with shrink etching step
- Patent Title (中): 采用收缩蚀刻步骤进行基板加工
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Application No.: US12709016Application Date: 2010-02-19
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Publication No.: US08642483B2Publication Date: 2014-02-04
- Inventor: Masanobu Honda
- Applicant: Masanobu Honda
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Agency: Rothwell, Figg, Ernst & Manbeck, P.C.
- Priority: JP2009-038046 20090220
- Main IPC: H01L21/302
- IPC: H01L21/302

Abstract:
A substrate processing method that processes a substrate including a processing target layer, an intermediate layer, and a mask layer as stacked in that order. The intermediate layer includes an Si-ARC (Si-containing Anti-Reflection Coating) film and the mask layer has an opening exposing a part of the Si-ARC. The substrate processing method includes a shrink etching step during which an opening width reduction process and an etching process are performed concurrently. In the opening width reduction process, deposits are formed on a sidewall surface of the opening of the mask layer by a plasma generated from a gaseous mixture of an anisotropic etching gas and one of a depositive gas and H2 gas. And in the etching process, the Si-ARC film forming a bottom portion of the opening are etched.
Public/Granted literature
- US20100216314A1 SUBSTRATE PROCESSING METHOD Public/Granted day:2010-08-26
Information query
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