Invention Grant
- Patent Title: Isolation region fabrication for replacement gate processing
- Patent Title (中): 用于替换门处理的隔离区域制造
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Application No.: US13771275Application Date: 2013-02-20
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Publication No.: US08643109B2Publication Date: 2014-02-04
- Inventor: Brent A. Anderson , Edward J. Nowak
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Michael LeStrange
- Main IPC: H01L27/12
- IPC: H01L27/12

Abstract:
A semiconductor structure includes a silicon-on-insulator (SOI) substrate, the SOI substrate comprising a bottom silicon layer, a buried oxide (BOX) layer, and a top silicon layer; a plurality of active devices formed on the top silicon layer; and an isolation region located between two of the active devices, wherein at least two of the plurality of active devices are electrically isolated from each other by the isolation region, and wherein the isolation region extends through the top silicon layer to the BOX layer.
Public/Granted literature
- US20130161747A1 ISOLATION REGION FABRICATION FOR REPLACEMENT GATE PROCESSING Public/Granted day:2013-06-27
Information query
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