Invention Grant
- Patent Title: Edge termination configurations for high voltage semiconductor power devices
- Patent Title (中): 高压半导体功率器件的边缘端接配置
-
Application No.: US13134163Application Date: 2011-05-31
-
Publication No.: US08643135B2Publication Date: 2014-02-04
- Inventor: Madhur Bobde , Sik K Lui , Anup Bhalla
- Applicant: Madhur Bobde , Sik K Lui , Anup Bhalla
- Applicant Address: US CA Sunnyvale
- Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee: Alpha and Omega Semiconductor Incorporated
- Current Assignee Address: US CA Sunnyvale
- Agent Bo-In Lin
- Main IPC: H01L23/58
- IPC: H01L23/58 ; H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113
Abstract:
This invention discloses a semiconductor power device disposed in a semiconductor substrate and having an active cell area and an edge termination area wherein the edge termination area comprises a wide trench filled with a field-crowding reduction filler and a buried field plate buried under a top surface of the semiconductor substrate and laterally extended over a top portion of the field crowding field to move a peak electric field laterally away from the active cell area. In a specific embodiment, the field-crowding reduction filler comprises a silicon oxide filled in the wide trench.
Public/Granted literature
- US20120306044A1 Edge termination configurations for high voltage semiconductor power devices Public/Granted day:2012-12-06
Information query
IPC分类:
