Invention Grant
- Patent Title: System and a method for generating time bases in low power domain
- Patent Title (中): 在低功率域中生成时基的系统和方法
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Application No.: US12625585Application Date: 2009-11-25
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Publication No.: US08644447B2Publication Date: 2014-02-04
- Inventor: Chandra Bhushan Prakash , Balwinder Singh Soni
- Applicant: Chandra Bhushan Prakash , Balwinder Singh Soni
- Applicant Address: NL Amsterdam
- Assignee: STMicroelectronics International N.V.
- Current Assignee: STMicroelectronics International N.V.
- Current Assignee Address: NL Amsterdam
- Agency: Wolf, Greenfield & Sacks, P.C.
- Priority: IN2681/DEL/2008 20081126
- Main IPC: H03K21/00
- IPC: H03K21/00

Abstract:
A digital frequency divider including a parallel output register, a presettable asynchronous counter and a decoder. The parallel output register contains a desired count value. The presettable asynchronous counter has its preset data inputs coupled to the output of the parallel output register. The decoder receives its input from the data outputs of the presettable asynchronous divider and its output coupled to the load input of the presettable asynchronous counter.
Public/Granted literature
- US20100128837A1 SYSTEM AND A METHOD FOR GENERATING TIME BASES IN LOW POWER DOMAIN Public/Granted day:2010-05-27
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