Invention Grant
US08645746B2 Cable redundancy and failover for multi-lane PCI express IO interconnections
有权
多通道PCI Express IO互连的电缆冗余和故障转移
- Patent Title: Cable redundancy and failover for multi-lane PCI express IO interconnections
- Patent Title (中): 多通道PCI Express IO互连的电缆冗余和故障转移
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Application No.: US12959917Application Date: 2010-12-03
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Publication No.: US08645746B2Publication Date: 2014-02-04
- Inventor: Patrick A. Buckland , Jay R. Herring , Gregory M. Nordstrom , William A. Thompson
- Applicant: Patrick A. Buckland , Jay R. Herring , Gregory M. Nordstrom , William A. Thompson
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Patterson & Sheridan LLP
- Main IPC: G06F11/00
- IPC: G06F11/00
Abstract:
Method and apparatus for providing failover operation for a connection between a first PCIE bridge and a first input/output (IO) device are provided. A first set of bussed bits is exchanged between the first PCIE bridge and the first IO device over a first link using a first set of lanes of the first PCIE bridge. In response to detecting the failure in the first link, the first set of bussed bits is exchanged between the first PCIE bridge and the first IO device using an unused portion of a second link connecting a second PCIE bridge and a second IO device.
Public/Granted literature
- US20120144087A1 CABLE REDUNDANCY AND FAILOVER FOR MULTI-LANE PCI EXPRESS IO INTERCONNECTIONS Public/Granted day:2012-06-07
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