Invention Grant
US08648424B2 Semiconductor device including transistors having embedded source/drain regions each including upper and lower main layers comprising germanium
有权
半导体器件包括具有嵌入的源/漏区的晶体管,每个晶体管包括包含锗的上和下主层
- Patent Title: Semiconductor device including transistors having embedded source/drain regions each including upper and lower main layers comprising germanium
- Patent Title (中): 半导体器件包括具有嵌入的源/漏区的晶体管,每个晶体管包括包含锗的上和下主层
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Application No.: US13600375Application Date: 2012-08-31
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Publication No.: US08648424B2Publication Date: 2014-02-11
- Inventor: Hoi-Sung Chung , Dong-Hyuk Kim , Myung-Sun Kim , Dong-Suk Shin
- Applicant: Hoi-Sung Chung , Dong-Hyuk Kim , Myung-Sun Kim , Dong-Suk Shin
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2011-0142390 20111226
- Main IPC: H01L21/70
- IPC: H01L21/70

Abstract:
A semiconductor device includes a substrate having a channel region, a gate insulation layer on the channel region, a gate electrode on the gate insulation layer, and source and drain regions in recesses in the substrate on both sides of the channel region, respectively. The source and drain regions include a lower main layer whose bottom surface is located at level above the bottom of a recess and lower than that of the bottom surface of the gate insulation layer, and a top surface no higher than the level of the bottom surface of the gate insulation layer, and an upper main layer contacting the lower main layer and whose top surface extends to a level higher than that of the bottom surface of the gate insulation layer, and in which the lower layer has a Ge content higher than that of the upper layer.
Public/Granted literature
- US20130161751A1 SEMICONDUCTOR DEVICE INCLUDING TRANSISTORS Public/Granted day:2013-06-27
Information query
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