A drive control signal generating circuit that generates a drive control signal for driving a motor includes an output control circuit that includes a flip-flop in which a state changes by a rotational state signal of the motor crossing a reference value and generates a motor drive control signal according to the state of the flip-flop, a clock generating circuit that generates a clock that defines a time of reading data in the flip-flop of the output control circuit; and a PWM conversion circuit that PWM-converts the drive control signal using the clock as a PWM signal. The clock has a frequency in which the output control circuit operates and has a duty ratio of the PWM signal.