Invention Grant
- Patent Title: Decoding circuit, decoding device, and decoding system
- Patent Title (中): 解码电路,解码装置和解码系统
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Application No.: US11791220Application Date: 2005-11-15
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Publication No.: US08649439B2Publication Date: 2014-02-11
- Inventor: Keishi Chikamura , Takeshi Tanaka
- Applicant: Keishi Chikamura , Takeshi Tanaka
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2004-342198 20041126
- International Application: PCT/JP2005/020952 WO 20051115
- International Announcement: WO2006/057182 WO 20060601
- Main IPC: H04N7/12
- IPC: H04N7/12

Abstract:
A decoding circuit, a decoding device, and a decoding system are included for decoding a B picture encoded by a direct mode at a high speed. A decoding process of an n-th macroblock is performed in parallel with transfer of a motion vector of an anchor block for an (n+1)-th macroblock to a buffer 106. With this construction, even if the (n+1)-th macroblock is encoded by the direct mode, a motion vector can be immediately calculated using the motion vector of the anchor block for the (n+1)-th macroblock in the buffer 106, when the (n+1)-th macroblock is decoded during a time T2.
Public/Granted literature
- US20080008244A1 Decoding Circuit, Decoding Device, And Decoding System Public/Granted day:2008-01-10
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