Invention Grant
- Patent Title: Wafer dicing employing edge region underfill removal
- Patent Title (中): 晶圆切割采用边缘区域底部填充去除
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Application No.: US13474090Application Date: 2012-05-17
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Publication No.: US08652941B2Publication Date: 2014-02-18
- Inventor: Richard F. Indyk , Jae-Woong Nah , Satoru Katsurayama , Daisuke Oka , Shigefumi Okada
- Applicant: Richard F. Indyk , Jae-Woong Nah , Satoru Katsurayama , Daisuke Oka , Shigefumi Okada
- Applicant Address: US NY Armonk JP Tokyo JP Tokyo
- Assignee: International Business Machines Corporation,Disco Corporation,Sumitomo Bakelite Company Ltd.
- Current Assignee: International Business Machines Corporation,Disco Corporation,Sumitomo Bakelite Company Ltd.
- Current Assignee Address: US NY Armonk JP Tokyo JP Tokyo
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Louis J. Percello, Esq.
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/46 ; H01L21/301 ; H01L21/44 ; H01L21/50

Abstract:
In one embodiment, a dielectric material layer embedding metal structures is ablated from the chip-containing substrate by laser grooving, which is performed on dicing channels of the chip-containing substrate. Subsequently, an underfill layer is formed over the dielectric material layer in a pattern that excludes the peripheral areas of the chip-containing substrate. The physically exposed dicing channels at the periphery can be employed to align a blade to dice the chip-containing substrate. In another embodiment, an underfill layer is formed prior to any laser grooving. Mechanical cutting of the underfill layer from above dicing channels is followed by laser ablation of the dicing channels and subsequent mechanical cutting to dice a chip-containing substrate.
Public/Granted literature
- US20130149841A1 WAFER DICING EMPLOYING EDGE REGION UNDERFILL REMOVAL Public/Granted day:2013-06-13
Information query
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