Invention Grant
- Patent Title: Semiconductor memory device
- Patent Title (中): 半导体存储器件
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Application No.: US13215594Application Date: 2011-08-23
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Publication No.: US08654559B2Publication Date: 2014-02-18
- Inventor: Takashi Nakano , Yukio Tamai , Nobuyoshi Awaya
- Applicant: Takashi Nakano , Yukio Tamai , Nobuyoshi Awaya
- Applicant Address: JP Osaka
- Assignee: Sharp Kabushiki Kaisha
- Current Assignee: Sharp Kabushiki Kaisha
- Current Assignee Address: JP Osaka
- Agency: Nixon & Vanderhye, P.C.
- Priority: JP2010-209197 20100917
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
The invention provides a semiconductor memory device including a variable resistance element capable of decreasing a variation of a resistance value of stored data due to a large number of times of switching operations and capable of performing a stable writing operation. The device has a circuit that applies a reforming voltage pulse to a memory cell including a variable resistance element of a degraded switching characteristic and a small read margin due to a large number of times of application of a write voltage pulse, to return each resistance state of the variable resistance element to an initial resistance state. By applying the reforming voltage pulse, the variable resistance element can recover at least one resistance state from a variation from the initial resistance state, and can recover the switching characteristic. Accordingly, there is obtained a semiconductor memory device in which a reduction of a read margin is suppressed.
Public/Granted literature
- US20120069626A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2012-03-22
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