An operating method of a semiconductor memory device includes erasing all memory cells of a selected cell block, performing a soft program operation on the erased memory cells by supplying a soft program pulse to word lines of the selected cell block, performing a first verify operation using a first voltage level lower than a target voltage level of the soft program operation, performing a second verify operation using the target voltage level, setting voltages of bit lines, and repeating the soft program operation, the first verify operation, the second verify operation, and an operation of setting the voltages of bit lines while raising the soft program pulse gradually.