Invention Grant
- Patent Title: Multilayer wiring substrate
- Patent Title (中): 多层布线基板
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Application No.: US13070094Application Date: 2011-03-23
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Publication No.: US08658905B2Publication Date: 2014-02-25
- Inventor: Shinnosuke Maeda , Tatsuya Ito , Satoshi Hirano
- Applicant: Shinnosuke Maeda , Tatsuya Ito , Satoshi Hirano
- Applicant Address: JP Nagoya
- Assignee: NGK Spark Plug Co., Ltd.
- Current Assignee: NGK Spark Plug Co., Ltd.
- Current Assignee Address: JP Nagoya
- Agency: Stites & Harbison PLLC
- Agent Jeffrey A. Haeberlin; Nicolo Davidson
- Priority: JP2010-73436 20100326
- Main IPC: H05K1/03
- IPC: H05K1/03

Abstract:
In a wiring laminate portion of a multilayer wiring substrate, a solder resist layer having a plurality of openings is disposed on a main surface side of the laminate structure, and connection terminals are embedded in an outermost resin insulation layer in contact with the solder resist layer. Each of the connection terminals comprises a copper layer and a metallic layer formed of at least one type of metal other than copper. A main-surface-side circumferential portion of the copper layer is covered by the solder resist layer. At least a portion of the metallic layer is located in a recess in a main-surface-side central portion of the copper layer. At least a portion of the metallic layer is exposed via a corresponding opening.
Public/Granted literature
- US20110232951A1 MULTILAYER WIRING SUBSTRATE Public/Granted day:2011-09-29
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