Invention Grant
- Patent Title: Semiconductor package having electrode on side surface, and semiconductor device
- Patent Title (中): 具有侧面电极的半导体封装以及半导体器件
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Application No.: US13600971Application Date: 2012-08-31
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Publication No.: US08659138B2Publication Date: 2014-02-25
- Inventor: Shouichi Kobayashi , Hiroyuki Tanaka
- Applicant: Shouichi Kobayashi , Hiroyuki Tanaka
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Hamre, Schumann, Mueller & Larson, P.C.
- Priority: JP2010-051903 20100309
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A semiconductor package includes a substrate, a semiconductor chip disposed on the substrate, and a connection wiring connected electrically to the semiconductor chip. The semiconductor package further includes a sidewall formed of an insulator, an inner electrode formed on a first surface of the sidewall that faces the substrate, and a sidewall external electrode formed on a second surface of the sidewall different from the first surface. The inner electrode and the sidewall external electrode are connected electrically, and the inner electrode is connected to the connection wiring. With this configuration, it is possible to suppress the semiconductor package from being large due to an increase in the number of sidewall external electrodes formed on the side surfaces of the semiconductor package, and to shorten a connection distance between the semiconductor packages by connecting the sidewall external electrodes.
Public/Granted literature
- US20120326293A1 SEMICONDUCTOR PACKAGE HAVING ELECTRODE ON SIDE SURFACE, AND SEMICONDUCTOR DEVICE Public/Granted day:2012-12-27
Information query
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