Invention Grant
US08659172B2 Semiconductor device and method of confining conductive bump material with solder mask patch
有权
半导体器件及其方法,用于将导电凸块材料与阻焊片贴合
- Patent Title: Semiconductor device and method of confining conductive bump material with solder mask patch
- Patent Title (中): 半导体器件及其方法,用于将导电凸块材料与阻焊片贴合
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Application No.: US12963919Application Date: 2010-12-09
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Publication No.: US08659172B2Publication Date: 2014-02-25
- Inventor: Rajendra D. Pendse
- Applicant: Rajendra D. Pendse
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
A semiconductor device has a semiconductor die having a plurality of die bump pad and substrate having a plurality of conductive trace with an interconnect site. A solder mask patch is formed interstitially between the die bump pads or interconnect sites. A conductive bump material is deposited on the interconnect sites or die bump pads. The semiconductor die is mounted to the substrate so that the conductive bump material is disposed between the die bump pads and interconnect sites. The conductive bump material is reflowed without a solder mask around the die bump pad or interconnect site to form an interconnect structure between the semiconductor die and substrate. The solder mask patch confines the conductive bump material within the die bump pad or interconnect site. The interconnect structure can include a fusible portion and non-fusible portion. An encapsulant is deposited between the semiconductor die and substrate.
Public/Granted literature
- US20120211882A9 Semiconductor Device and Method of Confining Conductive Bump Material with Solder Mask Patch Public/Granted day:2012-08-23
Information query
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