Invention Grant
US08664025B2 Substrate dicing technique for separating semiconductor dies with reduced area consumption
有权
用于分离半导体管芯的基板切割技术,减少面积消耗
- Patent Title: Substrate dicing technique for separating semiconductor dies with reduced area consumption
- Patent Title (中): 用于分离半导体管芯的基板切割技术,减少面积消耗
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Application No.: US13187076Application Date: 2011-07-20
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Publication No.: US08664025B2Publication Date: 2014-03-04
- Inventor: Daniel Richter , Frank Kuechenmeister
- Applicant: Daniel Richter , Frank Kuechenmeister
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Priority: DE102010040062 20100831
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
The width of scribe lines may be reduced in semiconductor devices by applying a process technique in which trenches may be formed first from the rear side on the basis of a required width of the corresponding trenches, while subsequently it may be cut into the substrate from the front side on the basis of a reduced thickness of the corresponding saw blades, thereby also enabling a reduction of the scribe line width. Furthermore, contamination of the front side, i.e., of the metallization system, may be reduced, for instance, by performing an optional intermediate cleaning process.
Public/Granted literature
- US20120049379A1 Substrate Dicing Technique for Separating Semiconductor Dies with Reduced Area Consumption Public/Granted day:2012-03-01
Information query
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