Semiconductor device manufacturing method

Invention Grant

US08664120B2 Semiconductor device manufacturing method 有权

Title translation: 半导体器件制造方法

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Patent Title: Semiconductor device manufacturing method
Patent Title (中): 半导体器件制造方法
Application No.: US13593063

Application Date: 2012-08-23
Publication No.: US08664120B2

Publication Date: 2014-03-04
Inventor: Shinya Watanabe
Applicant: Shinya Watanabe
Applicant Address: JP Tokyo
Assignee: Kabushiki Kaisha Toshiba
Current Assignee: Kabushiki Kaisha Toshiba
Current Assignee Address: JP Tokyo
Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
Priority: JP2007-147108 20070601
Main IPC: H01L21/311
IPC: H01L21/311

Abstract:

In a semiconductor device manufacturing method, on a film to be processed, a mask material film is formed which has pattern openings for a plurality of contact patterns and connection openings for connecting adjacent pattern openings in such a manner that the connection between them is constricted in the middle. Then, a sidewall film is formed on the sidewalls of the individual openings in the mask material film, thereby not only making the diameter of the pattern openings smaller but also separating adjacent pattern openings. Then, the film to be processed is selectively etched with the mask material film and sidewall film as a mask, thereby making contact holes.

Abstract(Chinese):

在半导体器件制造方法中，在被处理膜上形成掩模材料膜，该掩模材料膜具有用于多个接触图案的图案开口和用于连接相邻图案开口的连接开口，使得它们之间的连接被收缩中间。然后，在掩模材料膜中的各个开口的侧壁上形成侧壁膜，由此不仅使得图案开口的直径更小，而且分离相邻的图案开口。然后，用掩模材料膜和侧壁膜作为掩模选择性地蚀刻待处理的膜，从而形成接触孔。

Public/Granted literature

US20120315766A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2012-12-13

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/30	....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/28）
H01L21/31	.....在半导体材料上形成绝缘层的，例如用于掩膜的或应用光刻技术的（密封层入H01L21/56）；以及这些层的后处理；这些层的材料的选择
H01L21/3105	......后处理
H01L21/311	.......绝缘层的刻蚀