Invention Grant
- Patent Title: Gettering method for dielectrically isolated devices
- Patent Title (中): 介电隔离装置的吸气方法
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Application No.: US13237671Application Date: 2011-09-20
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Publication No.: US08664746B2Publication Date: 2014-03-04
- Inventor: Janusz Karol Korycinski , Wanliang Wen
- Applicant: Janusz Karol Korycinski , Wanliang Wen
- Applicant Address: SG Singapore
- Assignee: STMicroelectronics Pte. Ltd.
- Current Assignee: STMicroelectronics Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: Seed IP Law Group PLLC
- Main IPC: H01L29/30
- IPC: H01L29/30

Abstract:
A silicon on insulater (SOI) wafer is provided. A dielectric layer is formed on an active silicon substrate of the wafer. The dielectric layer is patterned and etched to expose selected portions of the silicon substrate. Impurities are then introduced into the exposed portions of the silicon substrate to act as gettering regions. The dielectric layer is then removed and an epitaxial layer of silicon is grown on the silicon substrate. Trenches are etched in the epitaxial layer of silicon through the gettering regions, partially removing the gettering regions and any contaminants contained therein. Remaining portions of the gettering regions still act as gettering regions during subsequent process steps.
Public/Granted literature
- US20130069203A1 GETTERING METHOD FOR DIELECTRICALLY ISOLATED DEVICES Public/Granted day:2013-03-21
Information query
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