Invention Grant
- Patent Title: Efficient parallel sub-packet decoding using multiple decoders
- Patent Title (中): 使用多个解码器的高效并行子包解码
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Application No.: US12400124Application Date: 2009-03-09
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Publication No.: US08665996B2Publication Date: 2014-03-04
- Inventor: Joseph Zanotelli , Mrinal Mahesh Nath , Arunava Chaudhuri , Kaushik Ghosh , Raghu Challa , Weihong Jing
- Applicant: Joseph Zanotelli , Mrinal Mahesh Nath , Arunava Chaudhuri , Kaushik Ghosh , Raghu Challa , Weihong Jing
- Applicant Address: US CA San Diego
- Assignee: Qualcomm Incorporated
- Current Assignee: Qualcomm Incorporated
- Current Assignee Address: US CA San Diego
- Agent Abdollah Katbab
- Main IPC: H04L27/06
- IPC: H04L27/06

Abstract:
A configurable decoder within a receiver (for example, within a wireless communication device) includes numerous decoders. In one mode, the multiple decoders are used to decode different sub-packets of a packet. When one decoder completes decoding the last sub-packet assigned to it of the packet, then that decoder generates a packet done indication. A control circuit receives the packet done indications, and when all the decoders have generated packet done indications then the control circuit initiates an action. In one example, the action is the interrupting of a processor. The processor responds by reading status information from the control circuit, thereby resetting the interrupt. End-of-packet markers are usable to generate packet done indications and to generate EOP interrupts. Similarly, end-of-group markers are usable to generate group done indications and to generate EOG interrupts. The decoder block is configurable to process sub-packets of a packet using either one or multiple decoders.
Public/Granted literature
- US20090245430A1 EFFICIENT PARALLEL SUB-PACKET DECODING USING MULTIPLE DECODERS Public/Granted day:2009-10-01
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