Invention Grant
- Patent Title: Transactional memory system with efficient cache support
- Patent Title (中): 具有高效缓存支持的事务性内存系统
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Application No.: US13656778Application Date: 2012-10-22
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Publication No.: US08667231B2Publication Date: 2014-03-04
- Inventor: Thomas J. Heller, Jr.
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent John Campbell
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A computer implemented method for use by a transaction program for managing memory access to a shared memory location for transaction data of a first thread, the shared memory location being accessible by the first thread and a second thread. A string of instructions to complete a transaction of the first thread are executed, beginning with one instruction of the string of instructions. It is determined whether the one instruction is part of an active atomic instruction group (AIG) of instructions associated with the transaction of the first thread. A cache structure and a transaction table which together provide for entries in an active mode for the AIG are located if the one instruction is part of an active AIG. The next instruction is executed under a normal execution mode in response to determining that the one instruction is not part of an active AIG.
Public/Granted literature
- US20130046937A1 TRANSACTIONAL MEMORY SYSTEM WITH EFFICIENT CACHE SUPPORT Public/Granted day:2013-02-21
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