Invention Grant
US08667258B2 High performance cache translation look-aside buffer (TLB) lookups using multiple page size prediction
失效
使用多页大小预测的高性能缓存翻译后备缓冲区（TLB）查找
- Patent Title: High performance cache translation look-aside buffer (TLB) lookups using multiple page size prediction
- Patent Title (中): 使用多页大小预测的高性能缓存翻译后备缓冲区（TLB）查找
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Application No.: US12821723Application Date: 2010-06-23
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Publication No.: US08667258B2Publication Date: 2014-03-04
- Inventor: Brian R. Prasky , Gregory W. Alexander , James J. Bonanno , Aaron Tsai , Joshua M. Weinberg
- Applicant: Brian R. Prasky , Gregory W. Alexander , James J. Bonanno , Aaron Tsai , Joshua M. Weinberg
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent John Campbell
- Main IPC: G06F7/38
- IPC: G06F7/38 ; G06F9/00 ; G06F9/44 ; G06F9/26 ; G06F9/34
Abstract:
A computer processing system method and apparatus having a processor employing an operating system (O/S) multi-task control between multiple user programs and which ensures that the programs do not interfere with each other, said computing processing system having a branch multiple page size prediction mechanism which predicts a page size along with a branch direction and a branch target of a branch for instructions of a processing pipeline, having a branch target buffer (BTB) predicting the branch target, said branch prediction mechanism storing recently used instructions close to the processor in a local cache, and having a translation look-aside buffer TLB mechanism which tracks the translation of the most recent pages and supports multiple page sizes.
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