Invention Grant
- Patent Title: Precision synchronisation architecture for superspeed universal serial bus devices
- Patent Title (中): 超速通用串行总线设备的精密同步架构
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Application No.: US13320401Application Date: 2010-05-20
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Publication No.: US08667316B2Publication Date: 2014-03-04
- Inventor: Peter Graham Foster
- Applicant: Peter Graham Foster
- Applicant Address: AU Adelaide
- Assignee: Chronologic Pty. Ltd.
- Current Assignee: Chronologic Pty. Ltd.
- Current Assignee Address: AU Adelaide
- Agency: Oliff PLC
- International Application: PCT/AU2010/000606 WO 20100520
- International Announcement: WO2010/132945 WO 20101125
- Main IPC: G06F1/12
- IPC: G06F1/12
Abstract:
A method of providing a synchronization channel to a SuperSpeed USB device is provided. The method including a SuperSpeed communication channel connection to the SuperSpeed USB device with a USB cable that has USB 2.0 D+ and D− data signalling lines disabled or disconnected at an upstream connection point; multiplexing synchronization information onto the D+/D− data signalling lines at the upstream connection point; and demultiplexing the synchronization information from the D+/D− signalling lines at a downstream connection point of the cable; whereby the synchronization channel is maintained across the D+/D− data signalling lines.
Public/Granted literature
- US20120059965A1 PRECISION SYNCHRONISATION ARCHITECTURE FOR SUPERSPEED UNIVERSAL SERIAL BUS DEVICES Public/Granted day:2012-03-08
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