Invention Grant
US08667319B2 System and method for clock control for power-state transitions 有权
用于功率状态转换的时钟控制系统和方法

  • Patent Title: System and method for clock control for power-state transitions
  • Patent Title (中): 用于功率状态转换的时钟控制系统和方法
  • Application No.: US12741001
    Application Date: 2008-10-16
  • Publication No.: US08667319B2
    Publication Date: 2014-03-04
  • Inventor: Greg Ehmann
  • Applicant: Greg Ehmann
  • Applicant Address: US CA Mountain View
  • Assignee: Synopsys, Inc.
  • Current Assignee: Synopsys, Inc.
  • Current Assignee Address: US CA Mountain View
  • Agency: Fenwick & West LLP
  • International Application: PCT/IB2008/054263 WO 20081016
  • International Announcement: WO2009/057008 WO 20090507
  • Main IPC: G06F1/04
  • IPC: G06F1/04
System and method for clock control for power-state transitions
Abstract:
Clock management is implemented using a variety of systems, devices and methods. According to one embodiment a clock transitioning circuit arrangement (104) is implemented for receiving data from a processor system (102) via a data bus (212, 214) and for modifying a state a clock-generation unit (106) having a local memory for controlling a plurality of clock outputs that provide clock signals for use by the processing system (102). The arrangement has a memory circuit (206) for storing the data from the processor system (102) and a control circuit (208) for accessing the data in the memory circuit (206) in response to a request to change a clock signal provided by an output of the plurality of clock outputs and for providing corresponding data to the local memory of the clock generation unit (106).
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