Invention Grant
US08667433B2 Polishing estimation/evaluation device, overpolishing condition calculation device, and computer-readable non-transitory medium thereof 有权
抛光估算/评估装置,过度抛光条件计算装置及其计算机可读的非暂时介质

  • Patent Title: Polishing estimation/evaluation device, overpolishing condition calculation device, and computer-readable non-transitory medium thereof
  • Patent Title (中): 抛光估算/评估装置,过度抛光条件计算装置及其计算机可读的非暂时介质
  • Application No.: US13593558
    Application Date: 2012-08-24
  • Publication No.: US08667433B2
    Publication Date: 2014-03-04
  • Inventor: Daisuke Fukuda
  • Applicant: Daisuke Fukuda
  • Applicant Address: JP Kawasaki
  • Assignee: Fujitsu Limited
  • Current Assignee: Fujitsu Limited
  • Current Assignee Address: JP Kawasaki
  • Agency: Fujitsu Patent Center
  • Priority: JP2010-026352 20100209
  • Main IPC: G06F17/50
  • IPC: G06F17/50
Polishing estimation/evaluation device, overpolishing condition calculation device, and computer-readable non-transitory medium thereof
Abstract:
A polishing estimation/evaluation device includes a dividing unit, an overpolished area extracting unit, and a dummy modifying unit. The dividing unit divides a layout of an integrated circuit into a plurality of partial areas. The overpolished area extracting unit refers to an overpolishing condition indicating whether overpolishing occurs in a vicinity of a partial area based on a wiring density in the partial area and a wiring density in surrounding areas of the partial area, and extracts a partial area where the overpolishing occurs from the plurality of partial areas obtained by the division by the dividing unit. The dummy modifying unit modifies dummy wiring in the partial area where the overpolishing occurs extracted by the overpolished area extracting unit and/or dummy wiring in surrounding areas of the partial area to reduce the number of partial areas where the overpolishing occurs.
Information query
Patent Agency Ranking
0/0