Invention Grant
- Patent Title: Circuit simulation methodology to calculate leakage current during any mode of circuit operation
- Patent Title (中): 在任何电路运行模式下计算泄漏电流的电路仿真方法
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Application No.: US13523786Application Date: 2012-06-14
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Publication No.: US08667442B1Publication Date: 2014-03-04
- Inventor: Wei M. Tian , An-Chang Deng , Che-Cheng Lin
- Applicant: Wei M. Tian , An-Chang Deng , Che-Cheng Lin
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Vista IP Law Group, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
A method for calculating leakage current associated with an integrated circuit, includes selecting a sampling point at which an input signal for the integrated circuit is in a quiescent state and determining the leakage current associated with the integrated circuit using the selected sampling point.
Information query
