Invention Grant
- Patent Title: Hierarchical visualization-based analysis of integrated circuits
- Patent Title (中): 集成电路的分层可视化分析
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Application No.: US13134700Application Date: 2011-06-13
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Publication No.: US08667455B1Publication Date: 2014-03-04
- Inventor: William Wai Yan Ho
- Applicant: William Wai Yan Ho
- Applicant Address: CN Hong Kong
- Assignee: Worldwide Pro Ltd.
- Current Assignee: Worldwide Pro Ltd.
- Current Assignee Address: CN Hong Kong
- Agency: Aka Chan LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A system or technique provides for a hierarchical visual-based analysis of electrical integrated circuit system simulation results. A 3D visualization may be used to identify and conduct an analysis of the integrated circuit. An analysis is done on a specific feature of the integrated circuit that is visible in the 3D visualization. The specific feature may be one that is obscured by other layers of the integrated circuit visualization.
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