Invention Grant
- Patent Title: Method of manufacturing semiconductor circuit device
- Patent Title (中): 制造半导体电路器件的方法
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Application No.: US13046098Application Date: 2011-03-11
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Publication No.: US08669156B2Publication Date: 2014-03-11
- Inventor: Kazuhiro Tsumura
- Applicant: Kazuhiro Tsumura
- Applicant Address: JP Chiba
- Assignee: Seiko Instruments Inc.
- Current Assignee: Seiko Instruments Inc.
- Current Assignee Address: JP Chiba
- Agency: Brinks Gilson & Lione
- Priority: JP2010-058446 20100315
- Main IPC: H01L21/8242
- IPC: H01L21/8242

Abstract:
Provided is a method of manufacturing a semiconductor circuit device including a MOS transistor and a capacitor element in which a gate electrode of a MOS transistor is formed of a first polysilicon film, a capacitor is formed of the first polysilicon film, a capacitor film, and a second polysilicon film, reduction in resistance of a normally-off transistor and reduction in resistance of a lower electrode of the capacitor are simultaneously performed, and reduction in resistance of an N-type MOS transistor and reduction in resistance of an upper electrode of the capacitor are simultaneously performed.
Public/Granted literature
- US20110223730A1 METHOD OF MANUFACTURING SEMICONDUCTOR CIRCUIT DEVICE Public/Granted day:2011-09-15
Information query
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