Invention Grant
US08669166B1 Methods of thinning and/or dicing semiconducting substrates having integrated circuit products formed thereon
有权
在其上形成有集成电路产品的半导体衬底的薄化和/或切割的方法
- Patent Title: Methods of thinning and/or dicing semiconducting substrates having integrated circuit products formed thereon
- Patent Title (中): 在其上形成有集成电路产品的半导体衬底的薄化和/或切割的方法
-
Application No.: US13585974Application Date: 2012-08-15
-
Publication No.: US08669166B1Publication Date: 2014-03-11
- Inventor: Rahul Agarwal , Ramakanth Alapati , Jon Greenwood
- Applicant: Rahul Agarwal , Ramakanth Alapati , Jon Greenwood
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/02 ; H01L21/683

Abstract:
One illustrative method disclosed herein includes forming a plurality of die above a crystalline semiconducting substrate, irradiating and cooling an edge region of the substrate to form an amorphous region in the edge region of the substrate and, after forming the amorphous region, performing at least one process operation to reduce the thickness of the substrate.
Public/Granted literature
Information query
IPC分类: