Invention Grant
US08671262B2 Single-port memory with addresses having a first portion identifying a first memory block and a second portion identifying a same rank in first, second, third, and fourth memory blocks
有权
具有地址的单端口存储器具有标识第一存储器块的第一部分和在第一，第二，第三和第四存储器块中标识相同等级的第二部分
- Patent Title: Single-port memory with addresses having a first portion identifying a first memory block and a second portion identifying a same rank in first, second, third, and fourth memory blocks
- Patent Title (中): 具有地址的单端口存储器具有标识第一存储器块的第一部分和在第一，第二，第三和第四存储器块中标识相同等级的第二部分
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Application No.: US13221587Application Date: 2011-08-30
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Publication No.: US08671262B2Publication Date: 2014-03-11
- Inventor: Cedric Minne
- Applicant: Cedric Minne
- Applicant Address: FR Crolles
- Assignee: STMicroelectronics (Crolles 2) SAS
- Current Assignee: STMicroelectronics (Crolles 2) SAS
- Current Assignee Address: FR Crolles
- Agency: Seed IP Law Group PLLC
- Priority: FR1056876 20100831
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00
Abstract:
A memory and a method for controlling a memory including: a set of first memory blocks of identical size, intended to contain first words, a set of second memory blocks of identical size, intended to contain second words, the number of second words being identical to the number of first words, a third memory block identical to the first blocks, a fourth memory block identical to the second blocks, each memory address comprising a first portion identifying a same line in all blocks, and each first word of the third block identifying a free word from among the second words sharing a same second address portion.
Public/Granted literature
- US20120054464A1 SINGLE-PORT MEMORY ACCESS CONTROL DEVICE Public/Granted day:2012-03-01
Information query
