Invention Grant
- Patent Title: Multi-threaded deterministic router
- Patent Title (中): 多线程确定性路由器
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Application No.: US13656628Application Date: 2012-10-19
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Publication No.: US08671379B1Publication Date: 2014-03-11
- Inventor: Jitu Jain , Vinay Verma , Taneem Ahmed , Sandor S. Kalman , Sanjeev Kwatra , Christopher H. Kingsley , Jason H. Anderson , Satyaki Das
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent Kevin T. Cuenot
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Within a system comprising a plurality of processors and a memory, a method of determining routing information for a circuit design for implementation within a programmable integrated circuit can include determining that nets of the circuit design comprise overlap and unrouting nets comprising overlap. A congestion picture can be determined that comprises costs of routing resources for the integrated circuit wherein the cost of a routing resource comprises a measure of historical congestion and a measure of current congestion, and wherein unrouted nets do not contribute to the measures of current congestion in the congestion picture. The method further can include concurrently routing a plurality of the unrouted nets via the plurality of processors executing in parallel according to the congestion picture and storing routing information for nets of the circuit design in the memory.
Information query