Invention Grant
US08683106B2 Control apparatus for fast inter processing unit data exchange in an architecture with processing units of different bandwidth connection to a pipelined ring bus
失效
用于在与流水线环形总线不同带宽连接的处理单元的架构中快速处理单元数据交换的控制装置
- Patent Title: Control apparatus for fast inter processing unit data exchange in an architecture with processing units of different bandwidth connection to a pipelined ring bus
- Patent Title (中): 用于在与流水线环形总线不同带宽连接的处理单元的架构中快速处理单元数据交换的控制装置
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Application No.: US12919633Application Date: 2008-03-03
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Publication No.: US08683106B2Publication Date: 2014-03-25
- Inventor: Hanno Lieske , Shorin Kyo
- Applicant: Hanno Lieske , Shorin Kyo
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- International Application: PCT/JP2008/054224 WO 20080303
- International Announcement: WO2009/110100 WO 20090911
- Main IPC: G06F13/14
- IPC: G06F13/14 ; G06F13/40
Abstract:
Nowadays, many architectures have processing units with different bandwidth requirements which are connected over a pipelined ring bus. The proposed invention can optimize the data transfer for the case where processing units with lower bandwidth requirements can be grouped and controlled together for a data transfer, so that the available bus bandwidth can be optimally utilized.
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