Invention Grant
US08683398B1 Automated synthesis of high-performance two operand binary parallel prefix adder
失效
自动合成高性能两个操作数二进制并行前缀加法器
- Patent Title: Automated synthesis of high-performance two operand binary parallel prefix adder
- Patent Title (中): 自动合成高性能两个操作数二进制并行前缀加法器
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Application No.: US13686624Application Date: 2012-11-27
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Publication No.: US08683398B1Publication Date: 2014-03-25
- Inventor: Mihir Choudhury , Ruchir Puri , Subhendu Roy , Sharad C. Sundararajan
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Preston J. Young
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
A method for automated synthesis of a parallel prefix device includes determining structural constraints for a given parallel prefix device; generating a plurality of candidate prefix graphs for the parallel prefix device by performing a search of possible prefix graphs meeting the constraints; performing physical synthesis of each of the plurality of candidate prefix graphs to generate performance information for each candidate prefix graph; and determining one or more of the plurality of candidate prefix graphs that meet performance criteria for incorporation into the parallel prefix device.
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