Invention Grant
- Patent Title: Method of manufacturing multilayer printed wiring board
- Patent Title (中): 多层印刷线路板的制造方法
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Application No.: US13211001Application Date: 2011-08-16
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Publication No.: US08683685B2Publication Date: 2014-04-01
- Inventor: Toru Nakai , Sho Akai
- Applicant: Toru Nakai , Sho Akai
- Applicant Address: JP Ogaki-shi
- Assignee: Ibiden Co., Ltd.
- Current Assignee: Ibiden Co., Ltd.
- Current Assignee Address: JP Ogaki-shi
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01K3/10
- IPC: H01K3/10

Abstract:
A multilayer printed wiring board includes a first interlaminar resin insulating layer, a first conductor circuit formed on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer formed on the first interlaminar resin insulating layer and the first conductor circuit, a second conductor circuit formed on the second interlaminar resin insulating layer. A via conductor can be formed in the opening portion. The opening portion of the second interlaminar resin insulating layer can expose a face of the first conductor circuit. The via conductor connects the first conductor circuit and the second conductor circuit. The via conductor includes an electroless plating film formed on inner wall face of the opening portion and includes an electrolytic plating film formed on the electroless plating film and on the exposed face of the first conductor circuit exposed by the opening portion. The second conductor circuit includes the electroless plating film and the electrolytic plating film.
Public/Granted literature
- US20110296682A1 MULTILAYER PRINTED WIRING BOARD AND METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD Public/Granted day:2011-12-08
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