Invention Grant
US08685850B2 System and method of plating conductive gate contacts on metal gates for self-aligned contact interconnections
有权
在金属栅极上镀覆导电栅极触点的自对准触点互连的系统和方法
- Patent Title: System and method of plating conductive gate contacts on metal gates for self-aligned contact interconnections
- Patent Title (中): 在金属栅极上镀覆导电栅极触点的自对准触点互连的系统和方法
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Application No.: US13494973Application Date: 2012-06-12
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Publication No.: US08685850B2Publication Date: 2014-04-01
- Inventor: John H. Zhang , Lawrence A. Clevenger , Carl J. Radens , Yiheng Xu
- Applicant: John H. Zhang , Lawrence A. Clevenger , Carl J. Radens , Yiheng Xu
- Applicant Address: US TX Coppell US NY Armonk
- Assignee: STMicroelectronics, Inc.,International Business Machines Corporation
- Current Assignee: STMicroelectronics, Inc.,International Business Machines Corporation
- Current Assignee Address: US TX Coppell US NY Armonk
- Agency: Seed IP Law Group PLLC
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/335

Abstract:
According to one embodiment of the invention, the gate contact is formed by a selective deposition on the gate electrode. One acceptable technique for the selective deposition is by plating. Plating is one process by which a metal structure, such as a gate contact, may be formed directly on the gate electrode. The plating is carried out by immersing the semiconductor die in a plating solution with the gate electrode exposed. The gate contact is plated onto the gate electrode and thus is ensured of being fully aligned exactly to the gate electrode. After this, the appropriate dielectric layers are formed adjacent the gate contact and over the source and drain to ensure that the gate electrode is electrically isolated from other components of the transistor.
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