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US08686511B2 Source/drain extension control for advanced transistors 有权
高级晶体管的源/漏扩展控制

Source/drain extension control for advanced transistors
Abstract:
A planar transistor with improved performance has a source and a drain on a semiconductor substrate that includes a substantially undoped channel extending between the source and the drain. A gate is positioned over the substantially undoped channel on the substrate. Implanted source/drain extensions contact the source and the drain, with the implanted source/drain extensions having a dopant concentration of less than about 1×1019 atoms/cm3′, or alternatively, less than one-quarter the dopant concentration of the source and the drain.
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