Invention Grant
- Patent Title: Inductor having a deep-well noise isolation shield
- Patent Title (中): 具有深井噪声隔离屏蔽的电感器
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Application No.: US12906026Application Date: 2010-10-15
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Publication No.: US08686539B1Publication Date: 2014-04-01
- Inventor: Vassili Kireev , Parag Upadhyaya , Toan D. Tran
- Applicant: Vassili Kireev , Parag Upadhyaya , Toan D. Tran
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent LeRoy D. Maunu
- Main IPC: H01L27/08
- IPC: H01L27/08

Abstract:
A shielded inductor in an integrated circuit includes conductive loops disposed on a deep-well noise shield for isolating a noise coupling between the conductive loops and the substrate of the integrated circuit. The deep-well noise shield includes a first well disposed within a second well that is disposed within the substrate of the integrated circuit. The second well includes a peripheral well, a deep-well layer, and slot wells. The peripheral well surrounds a periphery of the first well. The peripheral well and the deep-well layer are coupled together to provide two p-n junctions that separate the first well and the substrate. The slot wells are distributed inside the periphery of the first well. Each slot well and the deep-well layer are coupled together. Each slot well has a width and a length that is at least three times the width.
Information query
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