Invention Grant
- Patent Title: In situ-built pin-grid arrays for coreless substrates, and methods of making same
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Application No.: US13174109Application Date: 2011-06-30
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Publication No.: US08686566B2Publication Date: 2014-04-01
- Inventor: Mihir K. Roy , Matthew J. Manusharow
- Applicant: Mihir K. Roy , Matthew J. Manusharow
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent John N. Greaves
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/283
Abstract:
A coreless pin-grid array (PGA) substrate includes PGA pins that are integral to the PGA substrate without the use of solder. A process of making the coreless PGA substrate integrates the PGA pins by forming a build-up layer upon the PGA pins such that vias make direct contact to pin heads of the PGA pins.
Public/Granted literature
- US08952540B2 In situ-built pin-grid arrays for coreless substrates, and methods of making same Public/Granted day:2015-02-10
Information query
IPC分类:
