Invention Grant
- Patent Title: Method for evaluating semiconductor device
- Patent Title (中): 半导体器件评估方法
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Application No.: US13101387Application Date: 2011-05-05
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Publication No.: US08686750B2Publication Date: 2014-04-01
- Inventor: Koichiro Kamata
- Applicant: Koichiro Kamata
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP2010-111158 20100513
- Main IPC: G01R31/26
- IPC: G01R31/26

Abstract:
To provide a simple method for evaluating reliability of a transistor, a simple test which correlates with a bias-temperature stress test (BT test) is performed instead of the BT test. Specifically, a gate current value is measured in the state where a voltage lower than the threshold voltage of an n-channel transistor whose channel region includes an oxide semiconductor is applied between a gate and a source of the transistor and a potential applied to a drain is higher than a potential applied to the gate. The evaluation of the gate current value can be simply performed compared to the case where the BT test is performed; for example, it takes short time to measure the gate current value. That is, reliability of a semiconductor device including the transistor can be easily evaluated.
Public/Granted literature
- US20110279144A1 METHOD FOR EVALUATING SEMICONDUCTOR DEVICE Public/Granted day:2011-11-17
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