Invention Grant
- Patent Title: Multi-bit resistive-switching memory cell and array
- Patent Title (中): 多位电阻式开关存储单元和阵列
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Application No.: US13351358Application Date: 2012-01-17
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Publication No.: US08687432B2Publication Date: 2014-04-01
- Inventor: Tuo-Hung Hou , Shih-Chieh Wu
- Applicant: Tuo-Hung Hou , Shih-Chieh Wu
- Applicant Address: TW Hsinchu
- Assignee: National Chiao Tung University
- Current Assignee: National Chiao Tung University
- Current Assignee Address: TW Hsinchu
- Agency: Rosenberg, Klein & Lee
- Priority: TW100141564A 20111115
- Main IPC: G11C7/22
- IPC: G11C7/22

Abstract:
This invention proposes a multi-bit resistive-switching memory cell and array thereof. Multiple conduction paths are formed on each memory cell and independent of each other, and each conduction path can be in a high-resistance or low-resistance state, so as to form a multi-bit resistive-switching memory cell. A memory cell array can be formed by arranging a plurality of multi-bit resistive-switching memory cells, and the memory cell array provides a simple, high density, high performance and cost-efficient proposal.
Public/Granted literature
- US20130119340A1 MULTI-BIT RESISTIVE-SWITCHING MEMORY CELL AND ARRAY Public/Granted day:2013-05-16
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